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Exploiting Ferroelectric FETs: From In-Memory Computing to Machine Learning and Beyond

发布日期:2019-03-18 浏览量:95


报告题目:Exploiting Ferroelectric FETs: From In-Memory Computing to Machine Learning and Beyond
报告人:  Prof. Sharon Hu, IEEE Fellow,University of Notre Dame
报告时间:2019年3月20日上午:10:00 - 11:00
报告地点:复旦大学张江校区微电子楼369会议室


联系人:曾璇

 
CEDA Distinguished Lecture

by IEEE Fellow Prof. Sharon Hu of University of Notre Dame


Exploiting Ferroelectric FETs:
From In-Memory Computing to Machine Learning and Beyond


The inevitable slowdown of the CMOS scaling trend has fueled an explosion of research endeavors in finding a CMOS replacement. However, recent studies suggest that many of the emerging devices being investigated, if used as simple drop-in replacement for MOSFETs, may only achieve speedups that mirror historical trends in the best case. The consensus from the community is that cross-layer efforts are essential in combating the CMOS scaling challenge with emerging devices. This talk presents such an effort centered around a particular emerging device, ferroelectric FETs (FeFETs).


An FeFET is made by integrating a ferroelectric material layer in the gate stack of a MOSFET. It is a non-volatile device that can behave as both a transistor and a storage element. This unique property of FeFETs enables area efficient and low-power combined logic and memory, which are desirable for many data analytic and machine learning applications. This presentation will elaborate novel circuits/architectures based on FeFETs to accomplish computing in memory, ternary content addressable memory (TCAM) and crossbar arrays. Application-level benefits, particularly for machine learning, in comparison with other alternative technologies will be discussed.


Bio:
X. Sharon Hu is a professor in the department of Computer Science and Engineering at the University of Notre Dame, USA. Her research interests include low-power system design, circuit and architecture design with emerging technologies, hardware/software co-design and real-time embedded systems. She has published more than 300 papers in these areas. Some of her recognitions include the Best Paper Award from the Design Automation Conference and from the International Symposium on Low Power Electronics and Design, and the NSF CAREER award. She has participated in several large industry and government sponsored center-level projects and is a theme leader in an NSF/SRC E2CDA project. She is the General Chair of Design Automation Conference in 2018 and was the TPC chair of DAC in 2015. She also served as Associate Editor for IEEE Transactions on VLSI, ACM Transactions on Design Automation of Electronic Systems, etc. and is an Associate Editor of ACM Transactions on Cyber-Physical Systems. X. Sharon Hu is a Fellow of the IEEE.